The frequency of errors is increasing because of the high integration level of electronic circuits and of memories. It is therefore increasingly necessary to correct and to identify as incorrect digital signals, for example using error-correcting codes.
This also relates in particular to signals that are written to memory, and read from it again.
In particular, codes are advantageous that have good characteristics for error correction of 1-bit errors, and for identification of 2-bit and 3-bit errors. These correct the relatively frequent 1-bit errors, and the 2-bit and 3-bit errors, that occur less frequently, are identified.
One known 1-bit error-correcting code, in which 2-bit errors and 3-bit errors are in most cases identified reliably or with a high probability, is the Vasil'ev code, which is a non-linear code with a non-linear checking equation.
This is structured such that it consists of an inner code, to which at least one additional check bit is added in order to form the outer code, wherein the additional bit is determined by a non-linear function of the bits of the inner code.
In this case, for example, the inner code has the characteristic that there are pairs of 1-bit errors between which the inner code cannot distinguish. When decoding the inner code, it is then not possible to identify which of the two possible 1-bit errors of a pair such as this is present. The additional bit, which is determined by a non-linear function from the bits of the inner code, can then be used to distinguish between two possible 1-bit errors of a pair such as this.
A further check bit can also be added, as can the parity over the n-bits of the inner code and the additional non-linear syndrome bit.
This parity bit is used for improved error identification and to distinguish between different error types, as is known by way of example for a Hamming code.
However, the correction of 1-bit errors is complex.
For example, a multi-stage method is used for error correction, which first of all carries out a trial-and-error error correction process for one bit position of a possible error pair. A check is then carried out to determine whether the correct bit position of the pair has been corrected. In the event of an incorrect correction, the correction which has been made is reversed. The alternative bit position is then corrected. This method is complex.